The present invention relates to a computer system for executing, with a processor capable of executing a first instruction set, a program described for a second instruction set.
In general, a computer program is prepared on the premise that it is operated on a specific instruction set. However, computer hardware may get out of order due to aged deterioration. Thus, for using the program successively, introduction of new computer hardware is required. However, there may be a case wherein computer hardware having an instruction set as the premise for the program can not be introduced, for example, because the manufacture of the computer hardware has been terminated.
One method for enabling new computer hardware having a certain instruction set (first instruction set) to substantially execute a program described on the premise of a second instruction set, is conversion of the program into a program described with the first instruction set, i.e., an instruction set native to the computer hardware.
In program conversion methods, there are static conversion method in which the whole of a program is converted before the program is executed, and dynamic conversion method in which a program is converted at need while the program is executed. The static conversion method can not be applied to a case wherein distinction between instructions and data is indefinite, or a case wherein a branch destination address is not determined until the program is executed.
Contrastingly in the dynamic conversion method, the above problems do not arise. However, in accordance with a memory area for storing converted instructions, a problem of instruction cache conflict may arise. This will be described. In the dynamic conversion method, by execution of a program (emulation program) to be subjected to dynamic conversion, first, an instruction storing area for storing converted instruction string is secured on a memory; a program as the conversion object described with the second instruction set is converted into a program of the first instruction set and stored in the above instruction storing area; and instructions in the instruction storing area are executed. In case that additional characters (column numbers) used for retrieve in an instruction cache overlap between an area in the program being dynamically converted, wherein execution frequency is high, and an area for storing converted instructions, when an instruction in the converted instruction storing area is executed, a large number of instruction cache misses may occur and thus the performance may be considerably deteriorated. Such a condition in which a cache misses occurs because a plurality of program regions use the same instruction cache area is called cache conflict.
JP-A-10-187460 discloses a binary program converter of a dynamic conversion type. In the converter, on the basis of information when a program not having been converted, constituted by a plurality of instruction blocks, is executed, the plurality of blocks of the program not having been converted are rearranged. Thereby, instruction cache conflict when the converted program is executed is eliminated to improve the cache hit rate.